Synthesis of composite logic gate in QCA embedding underlying regular clocking

Quantum-dot Cellular Automata (QCA) has emerged as one of the alternative technologies for current CMOS technology. It advantage computing at a faster speed, consuming lower power, and work Nano- Scale. Besides these advantages, QCA logic is limited to its primitive gates, majority voter inverter only, results in limitation cost-efficient circuit realization. Numerous designs have been proposed realize various intricate gates penalty non-uniform clocking improper layout. This paper proposes Composite Gate (CG) QCA, which realizes all essential digital such AND, NAND, Inverter, OR, NOR, exclusive like XOR XNOR. Reportedly, design first kind generate basic single unit. The most striking feature this augmentation underlying with block, making it more realistic circuit. Reliable, Efficient, Scalable (RES) regular scheme utilized enhance design?s scalability efficiency. relevance best cited coplanar implementation 2-input symmetric functions, achieving 33% gain gate count without any garbage output. evaluation analysis dissipated energy both carried out. end product verified using QCADesigner2.0.3 simulator, QCAPro employed study power dissipation.